ECE-E433 Advanced Electronics II
Spring, 1997-98
Dr. Scoles

Welcome. You are the to access this page since March 26, 1998.

This course is the third in a senior sequence consisting of ECE-E431 Microelectronics I, ECE-E432 Advanced Electronics II, ECE-E433 Advanced Electronics III. The goal of the sequence is to familiarize students with the basics of Si chip fabrication, MOS transistor operation, CAD tools for design and simulation, and small analog and digital system design. Students who have taken this sequence in the past have gone on to work for Apple Computer, Intel, TI, AMD, IBM, and Rockwell Semicondutor among others.

Textbook

"VLSI Design Techniques for Analog and Digital Circuits", R.L. Geiger, P.E. Allen, N.R. Strader, McGraw-Hill, New York, 1990. ISBN 0-07-023253-9

Supplemental Materials

Some files on this web site are in Adobe .pdf format and require Adobe Acrobat Reader software. You can download this software free from Adobe's site.

• Microsim PSpice design and simulation tools
• A lexicon of semiconductor terms from Harris Semiconductor.
  

Syllabus

Week 1 Basic Digital Building Blocks

7.1 Design Abstraction, 7.2 Characteristics of Digital Circuits

Homework: 7.1, 7.3, 7.4, 7.5

Supplements

• Karnaugh map use in designing static NMOS and CMOS logic

Week 2 Basic Digital Building Blocks

7.3 MOS Inverters, 7.4 NMOS NOR/NAND Logic

Homework:7.7, 7.9, 7.12, 7.16, 7.17

Supplements

Week 3 Basic Digital Building Blocks

7.5 CMOS Inverters, 7.6 CMOS Logic Gates

Homework:

Supplements

Weeks 4 and 5 Basic Digital Building Blocks

7.7 Transmission Gates, 7.8 Signal Propagation Delays

Homework: Experiment 4 PreLab due Week 4, Experiment 4 Measurements due Week 5

Supplements

Week 6 Basic Digital Building Blocks

7.9 Capacitive Loading

Homework:

Supplements

Week 7 Basic Digital Building Blocks

7.10 Power Dissipation, 7.11 Noise

Homework:

Supplements

Weeks 8 - 10 Structured Digital Circuits and Systems

Topics of interest: PLA's, gate arrays, semiconductor memory

Homework:

Supplements

During the term I am hoping to supplement the lecures with three laboratory exercises where actual measurements will be taken on semiconductor devices and circuits. I am borrowing the laboratory material from that prepared by Professors W.T. Yeung and R.T. Howe at UC Berkeley. I am rewriting the experimental sections to better suit our hardware - LabVIEW driven GPIB hardware rather than an HP 4145 Parameter Analyzer. The original labs can be found at http://iesg.eecs.berk eley.edu/ee105/.

• Experiment 4 - Inverters
  • Simulations and measurements on NMOS and CMOS inverters
• Experiment 5 - Digital Circuits


• Measurements on logic gates and a ring oscillator

Grading
Homework	20%
Midterm	40%
Laboratories	40%
Total	100%

Revised 4/19/98